Semiconductor memory devices may be accessed in a number of ways. In conventional static and dynamic random access memories (RAMs), the address for the location of the desired data is furnished. The contents of this location, or data, in memory are then accessed. The contents of the location can then be returned. Another kind of semiconductor memory devices are Content Addressable Memories (CAMs). CAMs are accessed based upon the content of a memory location, or data, stored in the memory. The address of the location can then be returned. The CAM can refer to a binary CAM or a ternary CAM. Certain (binary) CAMs are accessed based upon an exact match of the data stored in memory and the data provided for the search. In other words, the data provided for the search and data stored include only binary data. For example, only a search of the term 0001 will return the location storing 0001 (if any). A ternary CAM also allows the matching of a “don't care”. For example, a ternary CAM may have a stored word that is 0XX1, which will match the search terms 0001, 0011, 0101, and 0111.
FIG. 1 is a high level diagram depicting the architecture of a conventional CAM 60. The conventional CAM cell 10 includes a memory element 20, a comparator 30, a search line (SL) 40, a match line (ML) 50. A plurality of these cells are arranged in a matrix of rows 22 and columns 24 to form a CAM memory array 60. Each row 22 contains a number of cells 10. The match line 50 is preferably common to all cells in a same row 22. Consequently, although only one match line 50 is depicted, there is one match line 50 per row 22. The search line 40 is preferably common to all cells in a same column 24. Consequently, although only one search line 40 is depicted, there is one search line 40 per column 24. Each row 22 can be considered to store at least a data word. In operation, a word desired to be accessed from a row 22 is furnished via the different SLs 40 belonging to a row 22. The data word on the SLs 40 is thus compared to the data in each memory cell 20 of each row 22 using the comparators 30 of each CAM cell 10. Thus, the data stored in each row 22 is compared, bit by bit, to the data provided on the SLs 40. If each bit or memory cell 20, in a row 22 matches the data on a SL 40, then the voltage on the corresponding match line 50 remains unchanged at a pre-charged value. If a bit, or CAM cell 10, in the row 22 does not match the data on the SL 40, then the corresponding match line 50 changes voltage, going to ground. This operation is carried out simultaneously for all rows 22 in the CAM array 60. The row 22 for which the match line stays high has contents that are the same as the desired data provided on the SLs 40. Thus, this row 22 is accessed and the address of the row location is returned. The data in the conventional CAM are, therefore, accessed based on the contents of a row composed of CAM cells 10. Typically, the conventional CAM array 60 has a single cycle throughput. Consequently, the conventional CAM array 60 is typically faster than many other hardware and software based search systems. The conventional CAM 60 may thus be used in a variety of applications requiring a high speed search.
The conventional CAM cell 10 can be either volatile or nonvolatile. Conventional volatile CAM cells 10 were initially developed from static RAM cells. The conventional CAM cells 10 were developed by adding transistors such that an output is provided to a match line 50. More recently, conventional dynamic RAM cells have also been used to provide conventional CAM cells 10. Use of static or dynamic RAM memory element 20 to provide a conventional CAM cell 10 results in conventional CAM cells 10 that are relatively fast. Conventional nonvolatile CAM cells 10 may also be provided. Such nonvolatile CAMs use multiple ETOX memory elements 20 in each CAM cell 10. In addition, multiple transistors are typically used for each CAM cell 10.
Although the conventional CAM cell 10 functions, one of ordinary skill in the art will readily recognize that CAM cells made from either static or dynamic RAMs are volatile. This means that the contents of such conventional CAM cells 10 are re-written each time that the conventional CAM 60 is powered up. Consequently, a separate nonvolatile memory unit must be provided. For example, the nonvolatile memory unit may be a hard disk. If the conventional CAM cell 10 is formed of either static or dynamic RAM elements 20, then data for the CAM 10 would have to be accessed from the nonvolatile memory unit each time the conventional CAM 60 restarts. If a nonvolatile CAM cell 10 is desired, then the data in the conventional CAM cell 10 must remain even after the supply voltage is cut off. Consequently, the use of the relatively fast static and dynamic RAM cells is not feasible for nonvolatile CAM 60. Conventional nonvolatile CAMs may include cells 20 composed of two ETOX elements. Such cells 20 consume a large amount of current and require the use of transistors with high voltage characteristics. It would be desirable for the conventional CAM to consume a smaller amount of area, for example by using a smaller number of transistors. In addition, the use of low voltage devices would also be desired to reduce the overhead for each CAM cell 10.
Accordingly, what is needed is a method and system for providing a CAM. The present invention addresses such a need.